1. Field of the Invention
The present invention relates to a solid-state imaging device used in apparatuses such as cameras, a method for driving the solid-state imaging device, and a method for manufacturing the solid-state imaging device. The present invention further relates to a camera including the solid-state imaging device and a method for driving the camera.
2. Description of the Related Art
In the related art, image sensors and digital cameras include charge-coupled-device (CCD) solid-state imaging devices of the interline transfer type. A CCD solid-state imaging device includes a two-dimensional array of photosensor sections and a plurality of vertical transfer registers (vertical CCDs) disposed at every column of the photosensor sections. The photosensor sections and the vertical transfer registers constitute an imaging area. The CCD solid-state imaging device further includes a horizontal transfer register (horizontal CCD) and an output section outside the imaging area. In a CCD solid-state imaging device, for example, a CCD solid-state imaging device used in video equipment with a large screen, such as a solid-state imaging device with high output rate used in a high-definition television (HDTV) system, it is necessary to drive the vertical transfer registers at a high rate. It is therefore common to supply clock signals to the vertical transfer registers using low-resistance shunt lines (see, for example, Japanese Unexamined Patent Application Publication No. 6-268192).
FIGS. 5A and 5B show the structure of a CCD solid-state imaging device of the related art having shunt lines. FIG. 5A is a plan view of the CCD solid-state imaging device, showing the main portion thereof, and FIG. 5B is a cross-sectional view of the CCD solid-state imaging device, taken along a line VB-VB of FIG. 5A. While one photosensor section 51 on a surface of a semiconductor substrate (not shown) is shown in FIGS. 5A and 5B, a plurality of photosensor sections 51 is arranged in a two-dimensional array on the semiconductor substrate. The semiconductor substrate has two-layer vertical transfer electrodes formed thereon with a gate insulator film 52 interposed. Each of the vertical transfer electrodes includes a first transfer electrode layer 53 and a second transfer electrode layer 54.
Shunt lines 55 are formed in the first transfer electrode layers 53 and the second transfer electrode layers 54. The shunt lines 55 are made of a low-resistance material, and they are formed in the vertical direction. One of two horizontally adjacent shunt lines 55 includes contact sections 56 electrically connecting this shunt line 55 and the first transfer electrode layers 53, and the other shunt line 55 includes contact sections 57 electrically connecting the other shunt line 55 and the second transfer electrode layers 54. Each of the photosensor sections 51 is a photodiode PD having a PN junction in which a p+-type semiconductor region and an n-type semiconductor region are combined, and the photodiodes PD are separated by channel stops CS.
In the above-described configuration, vertical transfer registers are driven by four-phase driving pulses, and driving pulses Vφ1, Vφ2, Vφ3, and Vφ4 shown in FIG. 5A are individually applied to the vertically adjacent first and second transfer electrode layers 53 and 54 via the corresponding shunt lines 55 and the contact sections 56 and 57. In the related art, the driving pulses Vφ1, Vφ2, Vφ3, and Vφ4 are applied according to a waveform shown in FIG. 6 so that the second transfer electrode layers 54 read signal charges stored in the photosensor sections 51. In order to reduce a read voltage to be applied to the second transfer electrode layers 54, an electrode width (or readout electrode width) W2 of the second transfer electrode layers 54 is as large as an electrode width W1 of the first transfer electrode layers 53 with respect to the photosensor sections 51.